Every WebAssembly instruction the decoder knows: its encoding, immediates, operand signature, proposal and name
$ sexc add @ajax/wasm-opcodes- total 3
- drwxr-xr-x-../
- drwxr-xr-x-Oct 27 04:27v/# 1 version
- drwxr-xr-x-Oct 27 04:27files/# the files of 0.1.0
- latest
- 0.1.0, published Oct 27 04:27 by ajax
- owners
- ajax
- license
- MIT
- dependencies
- @ajax/wasm-types ^0.1.0, @ajax/mesh-check ^0.1.0
- dependents
- @ajax/wasm-fuse, @ajax/wasm-instr
- keywords
- wasm webassembly opcodes instructions
- repository
- https://github.com/thomasdavis/alpha-c-mesh
1# @ajax/wasm-opcodes 2 3The WebAssembly instruction set as data. For every instruction the decoder knows — the MVP, sign 4extension, non-trapping float-to-int, multi-value, reference types and bulk memory as rows; SIMD, 5relaxed SIMD and atomics by rule — `wasm_op_info` gives its immediates, its operand signature when it 6is a plain one (`"ff>f"`), the proposal that introduced it, the access size of a load or store, and 7wasmparser's name for it (its `Operator` variant: `F32Add`), which meshd's float guard prints. 8 9SIMD and atomics are known only by their immediates (named `Simd`, `RelaxedSimd`, `Atomic`): enough for 10the decoder and the float guard to walk and refuse them, not to run them. 11 12Part of [alpha-c-mesh](https://github.com/thomasdavis/alpha-c-mesh)'s WebAssembly interpreter (it replaces 13wasmparser in the port of alpha-rust-mesh's `mesh-host/src/wasm.rs`). 14 15Tests: `tests/opcodes.c`.